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Condor Currents · September 25

Bridging LLM Serving and CXL-SSDs with Chunk-Aware KV Cache Management

## Episode Summary In this episode, we cover: - **Bridging LLM Serving and CXL-SSDs with Chunk-Aware KV Cache Management** (arXiv) - **HBF-Sim: An Extensible HBF Simulator for Large-scale GPU Memory Systems** (arXiv) - **RISC-V vs ARM: Which Instruction Set Architecture Will Dominate the Future? - Electropages** (google_arch) - **NextSilicon to Productize Arbel RISC-V Core into 64-Core Enterprise Processor for AI and HPC - HPCwire** (google_riscv) - **Security Researchers Find Current RISC-V CPU Implementations Coming Up Short - Phoronix** (google_riscv) --- *Sponsored by Ada, Ago Consulting, and Zen Semiconductor*

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## Episode Summary
In this episode, we cover:
- **Bridging LLM Serving and CXL-SSDs with Chunk-Aware KV Cache Management** (arXiv)
- **HBF-Sim: An Extensible HBF Simulator for Large-scale GPU Memory Systems** (arXiv)
- **RISC-V vs ARM: Which Instruction Set Architecture Will Dominate the Future? - Electropages** (google_arch)
- **NextSilicon to Productize Arbel RISC-V Core into 64-Core Enterprise Processor for AI and HPC - HPCwire** (google_riscv)
- **Security Researchers Find Current RISC-V CPU Implementations Coming Up Short - Phoronix** (google_riscv)
---
*Sponsored by Ada, Ago Consulting, and Zen Semiconductor*

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